World Bank’s IFC Places Its First AI Chip Bet on Quadric

Quadric closed a $46 million Series C second round on July 13, 2026, led by the International Finance Corporation (IFC), the World Bank Group’s private-sector investment arm. The deal pushes the Burlingame, California, chip design startup’s total capital raised to $90 million and is IFC’s first-ever investment in an AI chip company.

The underlying wager is narrower than the check size suggests. Quadric licenses the Chimera GPNPU, short for general-purpose neural processing unit, betting that a single programmable chip core can outrun the model churn that keeps breaking fixed-function AI chips, and that on-device silicon, not rented cloud compute, is how emerging economies close the AI gap.

IFC Leads Quadric’s Series C to a $46 Million Second Close

The financing, the second close of its Series C round, extends a round that first closed in January at $30 million. Quadric said the fresh capital will expand its customer support and go-to-market teams for existing customers in automotive, AI PCs and enterprise, plus incoming customers in humanoid robotics, wearables and networking.

Existing backers deepened their positions rather than stepping aside for the new lead.

• Pear VC – led Quadric’s original seed round and increased its stake in this close.
• BEENEXT – led the Series C’s first close in January and added to its position.
• Uncork Capital – an existing investor that also increased its commitment.
• Offline Ventures – a new investor this round, co-founded by Dave Morin, credited as the creator of Facebook Platform, and James Higa, a former Apple executive.

Pear VC’s founding managing partner, Mar Hershenson, said the firm doubled down because it has watched the company execute since its earliest days. “AI is moving outside the datacenter,” she said, arguing that chip companies now need silicon built to run models that do not exist yet, not just the ones shipping today.

Why Did the World Bank’s IFC Invest in an AI Chip Startup?

IFC’s chief investment officer, Mohamed Eissa, frames the check as closing a specific gap rather than chasing a trend: small businesses in developing countries priced out of cloud AI by per-token bills can run models on hardware they own instead. IFC has committed more than $3 billion to technology ventures in emerging markets, and this is its first bet on chip intellectual property itself.

“Powerful AI cannot remain the exclusive domain of hyperscalers if emerging markets are going to close the digital divide,” Eissa said.

His argument centers on economics rather than access. Once a small business owns the chip instead of renting cloud inference, Eissa argued, it escapes the recurring bills that price out smaller players, narrowing the productivity gap between firms in developing and wealthy markets. He tied the bet to industrial policy too, arguing that building efficient, programmable chips builds the kind of semiconductor and AI engineering talent that markets like India need to compete globally.

The thesis tracks with IFC’s own published research. A 2026 IFC report on AI investment gaps in emerging markets argues that deployment, not model access, is the binding constraint on adoption, since connectivity, compute, data governance and skills decide whether AI pilots turn into durable systems.

The round also lands amid a broader scramble of institutional money into AI infrastructure bets that look nothing alike. Venture investor Chamath Palihapitiya returned as CEO after a $135 million Series A for 8090 Labs, a reminder of how much capital is chasing AI infrastructure right now, on the software side as much as silicon.

Silicon That Depreciates Versus Silicon That Compounds

Quadric’s pitch rests on a specific failure mode in chip design. A chip’s feature set is frozen at tape-out, often years before it ships, while the AI models it needs to run keep changing every few months. Quadric’s chief executive frames the difference this way.

That’s the difference between silicon that depreciates and silicon that compounds.

Veerbhan Kheterpal, Quadric’s chief executive and co-founder, capped the point with two words: “Ask our customers.” His argument is that a fixed-function neural processing unit falls further behind with every model release, while a chip built on a software stack can pick up new models and get faster after it has already shipped.

Daniel Firu, Quadric’s co-founder and chief product officer, makes the same case from the software side. “Every NPU gets judged the day a new model drops,” he said. He described porting new models onto Chimera cores as a software update with no silicon change, calling that porting process itself the product, since the same core can run models published years after the chip was designed.

The claim has receipts. Kyocera Document Solutions licensed the Chimera core in 2025 for next-generation office equipment, with deputy senior general manager Michihiro Okada citing a platform built for “future revolutionary algorithms that no one today can predict.”

How Chimera’s 3,200 TOPS Claim Stacks Up

Quadric says the current Chimera architecture scales from 1 TOPS (tera operations per second, the standard yardstick for AI chip throughput) up to more than 3,200 TOPS in multi-chiplet configurations, covering convolutional vision models, transformer-based models, on-device large language model (LLM) inference, and emerging vision-language-action (VLA) models used in robotics.

TOPS numbers travel well in a press release and less well across vendors. Peak TOPS measures theoretical burst compute, not the sustained throughput a chip holds once heat and memory bandwidth start to bite, and different chipmakers rate performance using different precision formats, which makes cross-vendor comparisons rough at best.

Quadric’s own ceiling has climbed fast across generations. Its first Chimera core, launched in 2022, topped out around 1 TOPS. By 2024, its third-generation chip’s jump to 864 TOPS came in multicore clusters built for central ADAS controllers. The multi-chiplet figure Quadric cites now is nearly four times that, arriving as the broader category keeps expanding: a market projected to reach $68.73 billion by 2031, according to Mordor Intelligence, up from an estimated $30.74 billion this year.

Programmable NPUs are not the only architecture chasing this problem. Researchers at Monash University recently demonstrated a photonic chip that processes data with light at room temperature, one of several alternative approaches trying to squeeze more inference out of less power at the edge.

From a 1 TOPS Chip to a $90 Million War Chest

Quadric introduced the first Chimera core in November 2022: a single processor rated at 1 TOPS of machine learning throughput plus 64 GOPS of DSP (digital signal processor) capability, meant to prove that one programmable core could replace an NPU, a DSP and a real-time CPU. The third-generation QC series arrived in mid-2024 with individual cores running 7 to 108 TOPS, plus multicore clusters reaching 864 TOPS and automotive versions built to meet the ISO 26262 functional-safety standard.

Revenue followed the technical roadmap. Quadric’s chief marketing officer, Steve Roddy, told EE Times in January that the company had been profitable for its last two quarters on double-digit millions in revenue, and that the January round had doubled Quadric’s pre-money valuation from its previous raise.

• What we know: Quadric’s product revenue more than tripled in 2025 versus 2024.
• The company reached profitability during that same stretch, according to its own statements.

• What’s unconfirmed: Quadric’s valuation after this second close, which the company has not disclosed.
• The identity of the Asia-based edge-server LLM customer it signed in January, still withheld pending a product launch.
• Any revenue figure more specific than the “double-digit millions” Roddy cited back in January.

Where Quadric’s Bet Could Still Come Undone

The field Quadric is racing through is crowded and moving fast. An analysis of 2026 semiconductor trends from the Edge AI and Vision Alliance described a deeply fragmented field: AMD, Intel, Qualcomm, Apple and dozens of others now ship neural processing units with incompatible architectures and tooling. “The hardware for edge inference is arriving,” the analysis put it, while the software layer needed to run it well still lags behind.

Some of the competitive pressure is free. Google open-sourced its Coral NPU IP, and Synaptics became the first licensee to put it into silicon with new Astra-series parts, a sign that part of the market Quadric is chasing could commoditize before its programmable pitch fully lands.

The incumbents are not standing still either. AMD, whose data center revenue jumped 57% last quarter, ships its own Ryzen AI processors into the same laptop and industrial-edge sockets Quadric’s licensees are chasing, while Qualcomm and Intel run comparable neural processing lines inside Copilot+ certified PCs.

For now, Quadric says the new capital goes toward supporting the automotive, AI PC and enterprise customers it already has, while it staffs up for the humanoid robotics, wearables and networking business it expects to land next.

Frequently Asked Questions

What Is a GPNPU, and How Is It Different From a Regular NPU?

GPNPU stands for general-purpose neural processing unit, Quadric’s term for a single core that replaces a chip’s NPU, DSP and real-time CPU with one fully programmable block. A fixed-function NPU accelerates a narrow set of math operations in hardware; Chimera instead pairs a programmable arithmetic unit with a scalable multiply-accumulate array, so new AI operators are added through C++ code rather than a new chip design.

How Much Money Has Quadric Raised in Total, and From Whom?

Quadric has raised $90 million total. Pear VC led the seed round, BEENEXT’s Accelerate Fund led the Series C’s $30 million first close in January alongside new investors Volta, Gentree, Wanxiang America, Pivotal and Silicon Catalyst Ventures, and IFC led the $46 million second close in July with Offline Ventures joining as a new backer.

Who Is Actually Using Quadric’s Chips?

Kyocera Document Solutions licensed Chimera in 2025 for next-generation office equipment, and Tier IV, a Japanese autonomous-driving software developer, signed on in January 2026. That same month, an unnamed Asia-based silicon provider licensed the IP for an edge chip built to run large language models and generative AI in the 40 to 50 TOPS range.

What Is a Silicon Respin, and Why Does Quadric Say It Avoids One?

A silicon respin is the process of redesigning and refabricating a chip, which typically costs months of engineering time and a new manufacturing run. Because Chimera’s toolchain converts AI models into C++ code that runs on the same processor, Quadric says customers can add support for a new model through a software update instead of a new chip.

What Is the International Finance Corporation, and Why Does Its Bet Matter?

The International Finance Corporation is the World Bank Group’s private-sector investment arm, working in more than 100 countries to build markets in developing economies. Its stake in Quadric is the first time IFC has invested in an AI chip company specifically, tying a multilateral development lender to the bet that on-device chips, not hyperscale cloud, close the AI gap for emerging markets.