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OpenAI’s Jalapeño Chip Shares Halls With Maia 200

OpenAI’s Jalapeño inference chip posted 1.5 to 1.9 times more work per watt than GB200-class systems, and it will sit beside Microsoft’s Maia 200.

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OpenAI’s Jalapeño chip posted 1.5 to 1.9 times more AI work per watt than the GB200-class systems it was tested against. The figures landed on August 25, 2026, two months after the company and Broadcom showed the part, and they describe replies, not training runs.

The first racks are due inside OpenAI’s compute fleet by the end of 2026. Those halls already hold Nvidia GPUs and Microsoft’s own Maia 200, which has been serving GPT-5.2 since January.

Jalapeño’s First Results Beat GB200 on Watts

OpenAI measured the chip on InferenceX, a public suite from the research firm SemiAnalysis that walks a request from prompt to last token. The comparison points in the company’s appendix are Nvidia’s GB200 at a 1,200 W package rating and the GB300 at 1,400 W. Jalapeño is rated at 700 watts. On the workloads tested, sustained draw stayed at or below 550 watts.

Across GPT-OSS 120B, DeepSeek R1 670B, and Moonshot’s Kimi K2.5 1T, the company said Jalapeño delivered 1.5 to 1.9 times more work per watt at peak throughput and 1.7 to 3.6 times lower end-to-end latency. On highly interactive jobs it claimed 2.1 to 4.1 times higher performance. Richard Ho, who leads OpenAI’s hardware program, told reporters the usual hardware choice between low delay and high throughput is the thing the design tries to refuse.

THE INFERENCEX SCORECARD

Public model Peak mixed TPS / kW End-to-end latency Comparison package
GPT-OSS 120B 85,448 vs 44,960 (about 1.9×) 1.03 s vs 1.80 s (about 1.7× lower) GB200, 1,200 W
DeepSeek R1 670B 19,641 vs 11,781 (about 1.7×) 1.65 s vs 5.99 s (about 3.6× lower) GB300, 1,400 W
Kimi K2.5 1T 18,195 vs 11,862 (about 1.5×) 1.56 s vs 5.31 s (about 3.4× lower) GB300, 1,400 W

Those ratios use each chip’s published package rating, which helps a 700 W part on a per-watt chart against parts rated at 1,200 W and 1,400 W. OpenAI also ran the tests in single-token prediction. Many production stacks now draft extra tokens before verifying them. On DeepSeek R1, Hot Chips slides still showed a lead when Jalapeño stayed on single-token mode against a GB300 run that used multi-token prediction, about 1.5 times the peak mixed rate per kilowatt and 2.2 times lower end-to-end delay.

Nvidia’s newer Rubin parts are not in the appendix. That gap is the first thing serious readers will mark, and it is fair. The published win is against GB200 and GB300, on three public models, at a matched 8k/1k prompt-and-output shape.

Training Still Runs on Someone Else’s GPUs

Jalapeño is an inference chip. It is built to run a finished model when a person, an agent, or an API asks for the next tokens. It is not the part OpenAI will use to train the next frontier model from scratch.

That split is the bill the company actually pays in production. ChatGPT, Codex, and the API spend most of their silicon time answering, not studying. Prefill, the pass over the prompt, is heavy on math. Decode, the token-by-token reply, is heavy on memory traffic. Agents make that worse, because a slow step repeats across a whole task. OpenAI said it designed the part so model state, including the KV cache, can sit still while the chip lights the mix of compute, memory, and network each phase needs.

Ho put it in June as a blank-slate design around kernels, memory movement, networking, and serving patterns from frontier models. Greg Brockman, OpenAI’s president and co-founder, called the chip part of a long-term plan to serve more intelligence with less waste. The company still said it will widely deploy accelerators from Nvidia and other partners for training and for inference. The custom part is a new lane, not a vacant parking lot.

That is also why inference is the new cost bottleneck for anyone running a large chat product. A training cluster is a capital event. An answer stream is a meter that never stops.

Microsoft Already Runs GPT-5.2 on Maia 200

The overlooked operator in this launch is the landlord. On January 26, 2026, Scott Guthrie, Microsoft’s executive vice president for Cloud and AI, said the company’s Maia 200 already serving GPT-5.2 for Microsoft Foundry and Microsoft 365 Copilot. The first racks went into Azure’s US Central region near Des Moines, Iowa, with US West 3 near Phoenix, Arizona, next.

Maia 200 is also an inference chip. Microsoft built it on TSMC’s 3nm process, with more than 140 billion transistors, 216 GB of HBM3e at 7 TB/s, 272 MB of on-chip SRAM, and a 750 W SoC envelope. Guthrie said it delivers more than 10 petaFLOPS in 4-bit precision and more than 5 petaFLOPS of 8-bit performance, three times the FP4 of Amazon’s third-generation Trainium, and about 30% better performance per dollar than the latest hardware already in Azure. The Superintelligence team is using it for synthetic data and reinforcement learning on in-house models.

Hock Tan, Broadcom’s president and chief executive, said in June that the OpenAI work enables gigawatt-scale data centers with Microsoft and other partners beginning in 2026. OpenAI’s August note is narrower: it will begin deploying Jalapeño within OpenAI’s own compute infrastructure by the end of the year. Both can be true if those OpenAI racks sit in Microsoft buildings. It still leaves a crowded floor plan: Maia 200, Nvidia GB200-class systems, and now Jalapeño, all able to serve OpenAI models.

TWO INFERENCE CHIPS, ONE LANDLORD

Spec Jalapeño Maia 200
Job LLM inference AI inference, including GPT-5.2
Memory 216 GiB HBM4 216 GB HBM3e
Bandwidth 15.4 TB/s 7 TB/s
Rated power 700 W 750 W SoC
Status in 2026 First deploy by year end Live in Iowa, Phoenix next
Who builds it OpenAI design, Broadcom silicon, Celestica systems Microsoft, TSMC 3nm

HBM4 at 15.4 TB/s is more than twice Maia 200’s 7 TB/s on a similar memory footprint, which is the kind of gap that decides decode speed. Microsoft still owns the building, the Azure control plane, and a second Maia generation already in design. If Jalapeño takes OpenAI traffic, Maia keeps Copilot, Foundry, and Microsoft’s own models. If Microsoft racks both, the same campus will bill watts to two custom parts plus Nvidia.

Broadcom Taped Out Jalapeño in Nine Months

On June 24, 2026, OpenAI and Broadcom unveiled Jalapeño as the company’s first Intelligence Processor for LLM inference. Engineering samples were already running at production target frequency and power, including GPT-5.3-Codex-Spark. Broadcom handled silicon implementation and networking, including Tomahawk switch silicon. Celestica took board, rack, and system integration.

OpenAI said the path from initial design to manufacturing tape-out took nine months, and that it believes that is the fastest high-performance ASIC cycle yet. Treat that as the company’s clock, not a lab measurement. Hot Chips slides shown on August 25 sketched a longer human timeline: an architecture concept in late 2024, an RTL freeze in 2025, tape-out late that year, Codex on the chip in early 2026, then ChatGPT not long after.

FROM CONCEPT TO FIRST RESULTS

  1. Late 2024: Architecture concept for a purpose-built inference part.
  2. 2025: RTL freeze, then a late-year tape-out with Broadcom.
  3. Early 2026: Codex runs on engineering samples; ChatGPT follows.
  4. January 26, 2026: Microsoft puts Maia 200 into Azure US Central and points it at GPT-5.2.
  5. June 24, 2026: OpenAI and Broadcom unveil Jalapeño.
  6. August 25, 2026: Hot Chips and an OpenAI note publish the first InferenceX numbers.
  7. End of 2026: Planned start of deployment inside OpenAI’s compute fleet.

Broadcom is not a new name in this trade. The same company has long been the silicon partner behind Google’s TPU line. A shop that already knows how to take a model lab’s floorplan and turn it into a reticle is the quiet winner in a launch that the wire copy framed as OpenAI versus Nvidia.

This is just the beginning of a multi-generation roadmap. By co-developing our industry-leading silicon directly with OpenAI, we are enabling the deployment of gigawatt scale data centers with Microsoft and other partners beginning in 2026.

Hock Tan, President and CEO, Broadcom, June 24, 2026

SemiAnalysis, after running the part through InferenceX, put the compute die on TSMC’s N3P process and described a B0 stepping already in the fab that it expects to lift performance per watt by about 25% over the A0 silicon behind the August numbers. That process node and that stepping are the analysts’ account, not OpenAI’s blog.

Codex Wrote Kernels the Team Had Not Reached

OpenAI’s own models sat inside the design loop. The company said earlier systems helped explore implementations, shorten verification, and pack more arithmetic onto the die on schedule. Jalapeño was then set up as a simple target for both people and models: local tensors, explicit communication, predictable sync, so a search process can place and schedule work that is painful to hand-tune.

After A0 silicon came back, the team used Codex with GPT-Astra on new kernels to bring three open-weight models that were not in the original production plan to high speed in two months. For selected GPT-OSS attention and mixture-of-experts blocks, AI-written implementations ran 1.5 to 1.8 times faster than the existing expert-written ones. Those gains are for the chosen blocks, not a full model. Hot Chips slides also claimed a 56% PPA win on a BF16 multiply and a matrix unit about 10% smaller than the human baseline.

That loop is the part other chip teams will copy first. A nine-month tape-out is a scheduling boast. A compiler that can retarget a new open model in two months is how an inference ASIC avoids turning into a paperweight when the lab changes the architecture again.

What a 128-Chip Jalapeño Rack Holds

OpenAI’s Hot Chips slides listed the package at 13.4 PFLOP/s of MXFP4 matrix math, 15.4 TB/s of HBM4 across 216 GiB, and that 700 W envelope. A local domain groups 128 ASICs. A half-flattened two-level Clos built on Broadcom Tomahawk6 switches stretches a global domain to 2,048 chips, with 600 GB/s for the local mesh and 200 GB/s for the wider span. At 2,048 chips the slides put the system at 27 EFLOP/s and 432 TiB of HBM.

THE PACKAGE AND THE POD

  • Compute: 13.4 PFLOP/s of MXFP4 on one package, 27 EFLOP/s across 2,048 chips.
  • Memory: 216 GiB of HBM4 at 15.4 TB/s per package, 432 TiB at full pod scale.
  • Power: 700 W rated, 550 W or less measured on the tested jobs.
  • Network: 128-chip local domain at 600 GB/s, 2,048-chip global domain at 200 GB/s.
  • Software shape: spatial cores programmed as thread blocks, with unused units gated per phase so idle silicon does not keep drawing a full package.

Ho has described a 128-chip deployment as the working unit and a full pod as 2,048 ASICs. The August blog is less numerical and more operational: production qualification, software maturity, and checks on more models are still running. Small volume by the end of 2026 is the public plan. A ramp that matters for ChatGPT’s watt-hour bill is a 2027 story unless those qualification gates move.

Nvidia Stays in the Compute Mix

OpenAI’s own closing line in August is the one that should travel with every Jalapeño chart. The company will keep deploying Nvidia parts, and other partners’ accelerators, for training and for inference. Ho has grouped Nvidia and Cerebras in that partner set. Custom silicon here is a hedge on the cost of answers, not a divorce filing.

Google has been on this road since the first TPU. Amazon split the job between Trainium and Inferentia. Microsoft got Maia 200 into a live region in January and is already drawing Maia 300. OpenAI is late to that club and faster on the first tape-out than the usual multi-year ASIC slog, with a Broadcom line that already knows how to ship someone else’s accelerator at data-center scale.

WHAT WE KNOW

  • The job: Jalapeño is for inference, and the published wins are on GPT-OSS 120B, DeepSeek R1 670B, and Kimi K2.5 1T.
  • The partners: Broadcom implements the silicon and the Tomahawk network; Celestica builds the board and rack; Microsoft is named as a data-center partner.
  • The calendar: First deploy inside OpenAI’s fleet by the end of 2026; Gen 2 is deep in development; Gen 3 is taking shape.

WHAT IS UNCONFIRMED

  • Rubin: No public InferenceX table yet against Nvidia’s newer Rubin generation.
  • Volume: No OpenAI figure for how many ASICs ship in 2027, only that qualification is still underway.
  • The next stepping: SemiAnalysis’s B0, in the fab with a claimed 25% per-watt lift, has not been through the same public appendix.

The chip that showed up in June is real enough to put numbers on a public benchmark in August. The halls it is aimed at already have a Microsoft inference ASIC serving the same lab’s models, and they still have Nvidia on the floor for the work Jalapeño does not do. Gen 2 is the first chance to see whether that mix tilts, or whether OpenAI simply adds a third way to spend a watt on a token.

Harry is the editor of Oton Technology, an independent site he owns and edits, covering the part of technology that people actually have to act on. After ten years in journalism, first reporting and then editing, he works from primary material by habit: the advisory rather than the write up of it, the filing rather than the press release, the changelog rather than the launch video. Every figure in an article carries its source and its date, and where a number comes from a vendor or an analyst model rather than a count, he says so plainly instead of letting it stand as established fact. What he leaves out is anything he could not verify himself, which on a beat full of unnamed supply chain claims removes a great deal. That standard applies across all the sections the site publishes for an international audience, from artificial intelligence and security to phones, computers, gaming, crypto and the software businesses depend on. He corrects errors in the open and labels them, because a site that hides its mistakes is asking readers to trust the rest on nothing.

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