ASUS Unveils AMD EPYC Servers as CPUs Retake the Spotlight

ASUS unveiled two new enterprise server lines on July 23, 2026, built around AMD’s newly announced sixth generation EPYC 9006 chips, hours after AMD itself took the stage at its Advancing AI event in San Francisco to show them off. The chips are barely out of the lab. The servers are already stacking up.

Everyone watching AI hardware this year has been trained to look at GPUs. This launch points somewhere else. AMD’s server CPU business just posted its best quarter on record, and the agentic AI workloads ASUS is now selling boxes for need CPUs just as much as accelerators, maybe more than most people assumed.

Two Server Families Share One Socket Family

ASUS split its new lineup into two series aimed at different corners of the data center. The flagship RS700A and RS720A are dual socket machines built for extreme compute density, the kind of hardware ASUS is pitching at AI inferencing and complex simulation work. They pack 32 DIMM slots supporting ultrafast MRDIMM memory and up to 32 E3.S storage bays into a compact 2U chassis.

The RS500A and RS520A go the other direction. Single socket, under 800mm deep, built for rack constrained environments and mainstream enterprise workloads rather than the heaviest AI jobs. Both share PCIe 6.0 connectivity and E3.S storage support, and ASUS says the smaller series borrows modular components from its bigger siblings to cut engineering overhead.

This launch marks a significant milestone for ASUS and our clients.

Paul Ju, senior vice president of ASUS, said the new lineup was engineered to power every enterprise workload with flexible, scalable infrastructure, framing the launch as a foundation for what he called accelerating AI innovation with inference.

The Chip Behind ASUS’s New Servers

AMD calls its sixth generation EPYC family Venice, built on the new Zen 6 architecture and unveiled by chief executive Lisa Su at the same San Francisco event. The lineup tops out at 256 Zen 6c cores and 512 threads per socket, or up to 96 full Zen 6 cores running as fast as 5.0GHz, according to AMD’s own briefing materials reported by TechPowerUp and Tom’s Hardware.

That is a real jump from the previous EPYC 9005 Turin generation, which maxed out at 192 cores. AMD is claiming roughly 20% more performance per core on top of the higher ceiling. The high end Venice X variant adds 3D V-Cache for up to 1,152 MB of L3 cache per socket, aimed at simulation, analytics and in memory workloads.

Memory is where the generation shifts most. Venice supports 16 DDR5 memory channels with native DDR5-8000 and Gen2 MRDIMM speeds up to 12,800 MT/s, alongside PCIe 6.0 with as many as 160 lanes. Some configurations run thermal design power as high as 600W, a figure that matters more than it sounds once you get to cooling.

AMD is shipping the family across four platforms: the mainline SP7, an enterprise focused SP8 tuned for performance per node, the cache heavy 9006X, and an LPDDR5X based LP series formerly codenamed Verano for AI host nodes. SP7 chips are already in production, with shipments starting in the fourth quarter of 2026. SP8 follows in the first half of 2027, with 9006X and LP arriving in the back half of that year.

The memory jump lands at a pointed moment. DRAM and HBM supply has been the tightest link in AI hardware all year, a squeeze visible in Samsung’s soaring operating profit tied to AI memory chips this year. Faster MRDIMM standards raise the ceiling, but they do not fix the supply problem underneath it.

DIMM.2 and Thermal Radar Tame the Heat

None of that core count or wattage matters if the chip cooks itself. ASUS built four proprietary systems specifically to keep Venice fed and cool, and they read less like marketing bullet points once you consider a chip that can pull 600W.

• DC-MHS modular architecture – a zone partitioned chassis separating I/O, power, fan and storage modules, meant to speed development and let technicians swap failed parts without touching the rest of the box.
• ASUS DIMM.2 – a patented layout that moves M.2 storage into the cooler DIMM region of the board, avoiding thermal throttling without bolting on extra heatsinks.
• Thermal Radar 3.0 with PID Control – real time fan regulation through an algorithm that adjusts airflow continuously rather than in fixed steps, cutting energy use under sustained load.
• Tool-less maintenance design – service work that does not require a screwdriver, aimed squarely at cutting the labor cost baked into total cost of ownership.

Rising chip wattage is exactly why this engineering stopped being optional. A 600W part run at the density ASUS is targeting, 32 of them worth of storage and dual sockets in 2U, generates heat that a standard chassis was never built to move.

Agentic AI Is Pulling Budgets Back to the CPU

The GPU story has swallowed most of the AI hardware conversation this year. The server CPU numbers tell a different piece of it. AMD’s data center segment revenue jumped 57% year over year to $5.8 billion in the first quarter of 2026, a climb detailed in AMD’s own data center revenue surge this year, and Mercury Research now puts AMD’s share of x86 server CPU revenue at a record 46.2% for that quarter, against 53.8% for Intel.

That climb has been steep. AMD’s server CPU revenue share sat at just 25.1% in the second quarter of 2023. It reached 41.3% by the fourth quarter of 2025. Unit shipment share tells the same story from a different angle, up to 33.2% in the first quarter of 2026, a gain of six percentage points from a year earlier.

Mercury Research described Intel’s server shipments as flat, both sequentially and year over year, while AMD’s volumes climbed strongly on both measures. UBS analysts, cited in coverage of the same Mercury data, put Intel’s total server CPU share below 55% once Arm chips are counted, and forecast that agentic AI will drive a step change in CPU demand precisely because autonomous agents need general purpose cores to plan, call tools and execute code, not just matrix math.

That is the quiet trend ASUS’s launch sits inside. Every new agent that plans a task, calls an API or writes code before handing work to an accelerator runs on a CPU first. ASUS is not chasing the GPU story here. It is selling the plumbing underneath it.

A Crowded Launch Day in San Francisco

ASUS was not alone at AMD’s event. Supermicro used the same day to announce its own H15 server portfolio built on the identical EPYC 9006 chips, according to a release on the company’s investor relations site. Supermicro is claiming a 1.7x generational CPU performance improvement over its prior lineup, alongside 33% more cores, double the PCIe bandwidth and 2.6 times the memory bandwidth.

Supermicro paired its announcement with something ASUS did not show: the AMD Helios Platform, a 72 GPU liquid cooled rack scale system combining AMD Instinct accelerators, the new EPYC chips and AMD’s Pensando networking gear for large scale AI training.

Dan McNamara, AMD’s senior vice president and general manager of compute and enterprise AI, said the combined hardware would help customers deploy AI infrastructure faster while improving utilization, reducing energy consumption and lowering total cost of ownership.

Two OEMs, one chip family, two different pitches. ASUS is selling cooling engineering and deployment flexibility. Supermicro is selling raw generational performance and a rack scale AI training platform. Rival Taiwanese hardware makers have been making similar bets lately too, with GIGABYTE restructuring its entire COMPUTEX showcase around AI infrastructure rather than standalone hardware specs. When every OEM builds on the same AMD silicon, the chip stops being the differentiator. Execution speed and engineering polish become the pitch instead.

How Far Behind Is Intel Now?

Intel’s current server chip, Xeon 6 Granite Rapids, held one real technical edge over AMD’s outgoing generation: memory bandwidth through MRDIMM support. Venice’s new Gen2 MRDIMM capability closes that gap directly, leaving Intel’s Advanced Matrix Extensions, used for select AI workloads, as close to the only differentiator it has left, according to Phoronix’s technical breakdown of AMD’s announcement.

Intel’s actual answer to Zen 6, a chip codenamed Diamond Rapids, is not expected until at least 2027. That gives AMD a runway of a year or more where its newest server silicon faces no direct generational competitor from Intel, only the aging Granite Rapids lineup already conceding the memory argument.

AMD is not being shy about the comparison either, pointing to gains of up to 18 times the throughput of its first generation Naples EPYC chip from 2017 as evidence of how far the platform has come. Intel’s next real swing at this market will not land before ASUS, Supermicro and everyone else building on Venice have had a full year to sell into the gap.

Frequently Asked Questions

Is AMD’s EPYC 9006 Venice Available to Buy Now?

Not quite. AMD has not released full SKU tables or pricing for the EPYC 9006 family, and the SP7 chips at the top of the lineup will not ship until the fourth quarter of 2026, leading some outlets covering the announcement to call it a soft launch rather than a full one.

When Will ASUS’s New Servers Actually Ship?

ASUS has not published a shipping date for the RS700A, RS720A, RS500A or RS520A. Availability will likely track AMD’s own SP7 production schedule, which points to the fourth quarter of 2026 at the earliest for the highest performance configurations.

What Comes After Venice in AMD’s Server Lineup?

AMD has already named the next AI focused chip in its roadmap: EPYC 9006 LP, formerly codenamed Verano, arriving in the second half of 2027 with LPDDR5X memory built specifically to feed GPU heavy racks rather than run general workloads on its own.

How Does Zen 6 Compare to NVIDIA’s New Vera CPU?

AMD claims its 256 core Venice chip delivers 2.2 times the throughput of NVIDIA’s 88 core Vera CPU, and that its 96 core EPYC 9006X model runs about 1.2 times faster per core, based on AMD’s own benchmark comparisons presented at the launch.